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Our company was invited to participate in a seminar on 3D packaging substrate technology and give a presentation on the solution of TGV metallization

2025-05-08

On July 19th, the first post Moore era 3D packaging substrate technology seminar was held at Songshan Lake in Dongguan. The seminar, with the theme of "Empowering the Future of Chips with New Quality Productivity", gathered over 200 experts, scholars, and business representatives from the academic and industrial fields of 3D packaging substrates at Songshan Lake in Dongguan to discuss the development of 3D packaging substrate technology in the post Moore era.

 

This seminar is hosted by the China Semiconductor Industry Association, University of Electronic Science and Technology of China, Dongguan Science and Technology Bureau, Triassic (Guangdong) Technology Co., Ltd. and other units. 14 academic and industry experts from the TGV, TSV, and TCV technology chains, covering materials, equipment, and processes, were invited to give academic speeches. On the same day, Triassic also held a ceremony for the production of a fully automated TGV board level packaging production line. This is the first TGV board level packaging line in China, and the TGV board level packaging technology, which started at the same time as the international market, will use "overtaking" to promote new quality productivity and help the high-quality development of the semiconductor and integrated circuit industry. As a co organizer, our company had Dr. Luo Yanling, an expert in electronic slurry research and development, share a report on TGV gold T characterization at the meeting.

With the development of high-performance chips, traditional organic material substrates have shown certain limitations in the packaging applications of high-performance chips. As the number of fixed chips on the substrate increases, the total number of transistors integrated into the entire chip also increases accordingly. With the increasing demand for chip computing, signal transmission speed, power transmission efficiency, and stability of the packaging substrate have become particularly critical. Organic material substrates face the limit of capacity. Glass substrates, with their natural electrical properties, excellent mechanical properties, good thermal conductivity, and low coefficient of thermal expansion, have become a research focus for new advanced packaging technology substrates. The core technology of glass substrates, TGV (Trough Glass Via), has also entered the industry as a next-generation advanced packaging process to replace TSV technology. Intel, Internationally renowned technology chip companies such as Samsung, AMD, and Apple have also been exploring glass substrate chip packaging technology.

On July 19th, the first post Moore era 3D packaging substrate technology seminar was held at Songshan Lake in Dongguan. The seminar, with the theme of "Empowering the Future of Chips with New Quality Productivity", gathered over 200 experts, scholars, and business representatives from the academic and industrial fields of 3D packaging substrates at Songshan Lake in Dongguan to discuss the development of 3D packaging substrate technology in the post Moore era.

 

This seminar is hosted by the China Semiconductor Industry Association, University of Electronic Science and Technology of China, Dongguan Science and Technology Bureau, Triassic (Guangdong) Technology Co., Ltd. and other units. 14 academic and industry experts from the TGV, TSV, and TCV technology chains, covering materials, equipment, and processes, were invited to give academic speeches. On the same day, Triassic also held a ceremony for the production of a fully automated TGV board level packaging production line. This is the first TGV board level packaging line in China, and the TGV board level packaging technology, which started at the same time as the international market, will use "overtaking" to promote new quality productivity and help the high-quality development of the semiconductor and integrated circuit industry. As a co organizer, our company had Dr. Luo Yanling, an expert in electronic slurry research and development, share a report on TGV gold T characterization at the meeting.

With the development of high-performance chips, traditional organic material substrates have shown certain limitations in the packaging applications of high-performance chips. As the number of fixed chips on the substrate increases, the total number of transistors integrated into the entire chip also increases accordingly. With the increasing demand for chip computing, signal transmission speed, power transmission efficiency, and stability of the packaging substrate have become particularly critical. Organic material substrates face the limit of capacity. Glass substrates, with their natural electrical properties, excellent mechanical properties, good thermal conductivity, and low coefficient of thermal expansion, have become a research focus for new advanced packaging technology substrates. The core technology of glass substrates, TGV (Trough Glass Via), has also entered the industry as a next-generation advanced packaging process to replace TSV technology. Intel, Internationally renowned technology chip companies such as Samsung, AMD, and Apple have also been exploring glass substrate chip packaging technology.


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